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The ID_AA64ISAR1_EL1 provides information about the instructions implemented in AArch64 state.
ID_AA64ISAR1_EL1 is a 64-bit register, and is part of the Identification registers functional group.
This register is Read Only.
Indicates whether load-acquire (
LDA) instructions are implemented for a
Release Consistent core consistent RCPC model.
Indicates whether Data Cache, Clean to the Point of Persistence
DC CVAP) instructions are implemented.
There are no configuration notes.
Bit fields and details that are not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.