B1.9 AIDR, Auxiliary ID Register

The AIDR provides implementation defined identification information. This register is not used in the Cortex®-A55 core.

Bit field descriptions

AIDR is a 32-bit register, and is part of:

  • The Identification registers functional group.
  • The Implementation defined functional group.
Figure B1-5 AIDR bit assignments
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RES0, [31:0]
Reserved, RES0.
Configurations

There is one instance of this register that is used in both Secure and Non-secure states.

AArch32 System register AIDR is architecturally mapped to AArch64 System register AIDR_EL1. See B2.14 AIDR_EL1, Auxiliary ID Register, EL1.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

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