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The AIFSR provides extra IMPLEMENTATION DEFINED fault status information for Prefetch Abort exceptions that are taken to EL1 modes. This register is not used in the Cortex®-A55 core.
AIFSR is a 32-bit register, and is part of:
AArch32 System register AIFSR is architecturally mapped to AArch64 System register AFSR1_EL1. See B2.11 AFSR1_EL1, Auxiliary Fault Status Register 1, EL1.
AArch32 System register AIFSR(S) is architecturally mapped to AArch64 System register AFSR1_EL3. See B2.13 AFSR1_EL3, Auxiliary Fault Status Register 1, EL3.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.