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The CPACR controls access to floating-point, and Advanced SIMD functionality from EL0, EL1, and EL3.
CPACR is a 32-bit register, and is part of the Other system control registers functional group.
CPACR is architecturally mapped to AArch64 register CPACR_EL1. See B2.25 CPACR_EL1, Architectural Feature Access Control Register, EL1.
There is one copy of this register that is used in both Secure and Non-secure states.
Bits in the NSACR control Non-secure access to the CPACR fields. See the field descriptions cp10 and cp11.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.