B1.52 HAMAIR0, Hyp Auxiliary Memory Attribute Indirection Register 0

HAMAIR0 provides additional implementation defined memory attributes for the memory attribute encodings defined by HMAIR0. These implementation defined attributes can only provide additional qualifiers for the memory attribute encodings, and cannot change the memory attributes defined in HMAIR0. This register is not used in the Cortex®-A55 core.

Bit field descriptions

HAMAIR0 is a 32-bit register, and is part of:

  • The Virtualization registers functional group.
  • The Virtual memory control registers functional group.
  • The Implementation defined functional group.
Figure B1-37 HAMAIR0 bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


RES0, [31:0]
Reserved, RES0.
Configurations

AArch32 System register HAMAIR0 is architecturally mapped to AArch64 System register AMAIR_EL2[31:0]. See B2.16 AMAIR_EL2, Auxiliary Memory Attribute Indirection Register, EL2.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

Non-ConfidentialPDF file icon PDF version100442_0200_00_en
Copyright © 2016–2018 Arm Limited or its affiliates. All rights reserved.