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The MPIDR provides an additional core identification mechanism for scheduling purposes in a cluster. EDDEVAFF0 is a read-only copy of MPIDR accessible from the external debug interface.
MPIDR is a 32-bit register, and is part of the Identification registers functional group.
This register is Read Only.
Indicates a uniprocessor system, as distinct from core 0 in a multiprocessor system. This value is:
|Core is part of a multiprocessor system.|
Indicates whether the lowest level of affinity consists of logical cores that are implemented using a multi-threading type approach. This value is:
Affinity 0 represents threads. However, Cortex®-A55 is not multithreaded and so affinity 0 will always be zero. This allows consistency when in a system with other cores that are multithreaded.
0x00for core 0, to
0x07for core 7.
The MPIDR is:
There is one copy of this register that is used in both Secure and Non-secure states.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.