B2.5 ACTLR_EL1, Auxiliary Control Register, EL1

ACTLR_EL1 provides IMPLEMENTATION DEFINED configuration and control options for execution at EL1 and EL0.

Bit field descriptions

ACTLR_EL1 is a 64-bit register, and is part of:

  • The Other system control registers functional group.
  • The IMPLEMENTATION DEFINED functional group.
Figure B2-1 ACTLR_EL1 bit assignments
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RES0, [63:0]
RES0Reserved.
Configurations

AArch64 System register ACTLR_EL1 bits [31:0] are architecturally mapped to AArch32 System register ACTLR(NS). See B1.5 ACTLR, Auxiliary Control Register.

AArch64 System register ACTLR_EL1 bits [63:32] are architecturally mapped to AArch32 System register ACTLR2(S). See B1.6 ACTLR2, Auxiliary Control Register 2.

Bit fields and details that are not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

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