B2.14 AIDR_EL1, Auxiliary ID Register, EL1

AIDR_EL1 provides IMPLEMENTATION DEFINED identification information. This register is not used in the Cortex®-A55 core.

Bit field descriptions

AIDR_EL1 is a 32-bit register, and is part of:

  • The Identification registers functional group.
  • The IMPLEMENTATION DEFINED functional group.

This register is Read Only.

Figure B2-10 AIDR_EL1 bit assignments
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RES0, [31:0]
Reserved, RES0.
Configurations

AIDR_EL1 is architecturally mapped to AArch32 register AIDR. See B1.9 AIDR, Auxiliary ID Register.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

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