|Home > Register Descriptions > AArch64 system registers > AIDR_EL1, Auxiliary ID Register, EL1|
AIDR_EL1 provides IMPLEMENTATION DEFINED identification information. This register is not used in the Cortex®-A55 core.
AIDR_EL1 is a 32-bit register, and is part of:
This register is Read Only.
AIDR_EL1 is architecturally mapped to AArch32 register AIDR. See B1.9 AIDR, Auxiliary ID Register.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.