B2.15 AMAIR_EL1, Auxiliary Memory Attribute Indirection Register, EL1

AMAIR_EL1 provides IMPLEMENTATION DEFINED memory attributes for the memory regions specified by MAIR_EL1. This register is not used in the Cortex®-A55 core.

Bit field descriptions

AMAIR_EL1 is a 64-bit register, and is part of:

  • The Virtual memory control registers functional group.
  • The IMPLEMENTATION DEFINED functional group.
Figure B2-11 AMAIR_EL1 bit assignments
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RES0, [63:0]
Reserved, RES0.
Configurations

AArch64 System register AMAIR_EL1 bits [31:0] are architecturally mapped to AArch32 System register AMAIR0. See B1.11 AMAIR0, Auxiliary Memory Attribute Indirection Register 0.

AArch64 System register AMAIR_EL1 bits [63:32] are architecturally mapped to AArch32 System register AMAIR1. See B1.12 AMAIR1, Auxiliary Memory Attribute Indirection Register 1.

Bit fields and details that are not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

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