|Home > Register Descriptions > AArch64 system registers > ESR_EL2, Exception Syndrome Register, EL2|
The ESR_EL2 holds syndrome information for an exception taken to EL2.
ESR_EL2 is a 32-bit register, and is part of:
Instruction Length for synchronous exceptions. The possible values are:
See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile for more information.
Syndrome information. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile for more information.
When reporting a virtual SEI, bits[24:0] take the value of VSESRL_EL2[24:0].
When reporting a physical SEI, the following occurs:
0b000or an unrecoverable error (UEU) with value
When reporting a synchronous Data Abort, EA is RES0.
ESR_EL2 is architecturally mapped to AArch32 register HSR. See B1.57 HSR, Hyp Syndrome Register.
If EL2 is not implemented, this register is res0 from EL3.
RW fields in this register reset to architecturally UNKNOWN values.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.