|Home > Register Descriptions > AArch64 system registers > ID_AA64DFR0_EL1, AArch64 Debug Feature Register 0, EL1|
Provides top-level information about the debug system in AArch64.
ID_AA64DFR0_EL1 is a 64-bit register, and is part of the Identification registers functional group.
This register is Read Only.
Number of breakpoints that are context-aware, minus 1. These are the highest numbered breakpoints:
|Two breakpoints are context-aware.|
The number of watchpoints minus 1:
The number of breakpoints minus 1:
Performance Monitors Extension version.
|Performance monitor system registers implemented, PMUv3.|
|Trace system registers not implemented.|
Debug architecture version:
|Arm®v8‑A debug architecture implemented.|
ID_AA64DFR0_EL1 is architecturally mapped to external register EDDFR.
Bit fields and details that are not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.