B2.92 REVIDR_EL1, Revision ID Register, EL1

The REVIDR_EL1 provides revision information, additional to MIDR_EL1, that identifies minor fixes (errata) which might be present in a specific implementation of the Cortex®-A55 core.

Bit field descriptions

REVIDR_EL1 is a 32-bit register, and is part of the Identification registers functional group.

This register is Read Only.

Figure B2-79 REVIDR_EL1 bit assignments
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implementation defined, [31:0]

REVIDR_EL1 is architecturally mapped to AArch32 register REVIDR. See B1.79 REVIDR, Revision ID Register.

Bit fields and details that are not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

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