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If EL3 is the highest Exception level implemented, RVBAR_EL3 contains the IMPLEMENTATION DEFINED address that execution starts from after reset when executing in AArch64 state.
RVBAR_EL3 is a 64-bit register, and is part of the Reset management registers functional group.
This register is Read Only.
Reset Vector Base Address. The address that execution starts from after
reset when executing in 64-bit state. Bits[1:0] of this register are
, as this
address must be aligned, and bits [63:40] are
because the address must be within the
physical address size supported by the core.
The Reset Vector Base Address is determined by the signal RVBARADDRx.
There is no configuration information.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.