D1.3 DBGDEVID, Debug Device ID Register

The DBGDEVID specifies the version of the Debug architecture implemented and some features of the debug implementation.

Bit field descriptions

Figure D1-2 DBGDEVID bit assignments
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CIDMask, [31:28]

Specifies the level of support for the Context ID matching breakpoint masking capability. This value is:

0x0Context ID masking is not implemented.
AuxRegs, [27:24]

Specifies support for the Debug External Auxiliary Control Register. This value is:

0x0None supported.
DoubleLock, [23:20]

Specifies support for the Debug OS Double Lock Register. This value is:

0x1The core supports Debug OS Double Lock Register.
VirtExtns, [19:16]

Specifies whether EL2 is implemented. This value is:

0x1The core implements EL2.
VectorCatch, [15:12]

Defines the form of the vector catch event implemented. This value is:

0x0The core implements address matching form of vector catch.
BPAddrMask, [11:8]

Indicates the level of support for the Immediate Virtual Address (IVA) matching breakpoint masking capability. This value is:

0xFBreakpoint address masking not implemented. DBGBCRn[28:24] are res0.
WPAddrMask, [7:4]

Indicates the level of support for the DVA matching watchpoint masking capability. This value is:

0x1Watchpoint address mask implemented.
[3:0]

Reserved, RES0.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

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