D8.34 TRCIDR5, ID Register 5

The TRCIDR5 returns how many resources the trace unit supports.

Bit field descriptions

Figure D8-32 TRCIDR5 bit assignments
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Reduced Function Counter implemented:

0Reduced Function Counter not implemented.
NUMCNTR, [30:28]

Number of counters implemented:

0b010Two counters implemented.

Number of sequencer states implemented:

0b100Four sequencer states implemented.
RES0, [24]

Low-power state override support:

1Low-power state override support implemented.

ATB trigger support:

1ATB trigger support implemented.

Number of bits of trace ID:

0x07Seven-bit trace ID implemented.
RES0, [15:12]

Number of external input selectors implemented:

0b100Four external input selectors implemented.

Number of external inputs implemented:

0x1E30 external inputs implemented.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The TRCIDR5 can be accessed through the external debug interface, offset 0x1F4.

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