B1.41 ERXMISC3, Selected Error Record Miscellaneous Register 3

Register ERXMISC3 accesses bits [63:32] of the ERR<n>MISC1 miscellaneous register 1 for the error record selected by ERRSELR.SEL.

If ERRSELR.SEL==0, then ERXMISC3 accesses the ERR0MISC1[63:32] register of the core error record. See B3.6 ERR0MISC1, Error Record Miscellaneous Register 1.

If ERRSELR.SEL==1, then ERXMISC3 accesses the ERR1MISC1[63:32] register of the DSU error record. See the Arm® DynamIQ™ Shared Unit Technical Reference Manual.

Non-ConfidentialPDF file icon PDF version100442_0200_00_en
Copyright © 2016–2018 Arm Limited or its affiliates. All rights reserved.