B2.84 LOREA_EL1, LORegion End Address Register, EL1

The LOREA_EL1 register holds the physical address of the end of the LORegion described in the current LORegion descriptor selected by LORC_EL1.DS.

Bit field descriptions

LOREA_EL1 is a 64-bit register and is part of the Virtual memory control registers functional group.

Figure B2-71 LOREA_EL1 bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

Reserved, RES0.
EA, [47:16]

End physical address bits.

Reserved, RES0.

The LOREA_EL1 register is only applicable to the AArch64 state and is not accessible at any exception level in AArch32.

If no LORegion descriptors are supported by the core, then this register is res0.

If LORC_EL1.DS points to a LORegion that is not supported by the core, then this register is res0.

RW fields in this register reset to architecturally unknown

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

Non-ConfidentialPDF file icon PDF version100442_0200_00_en
Copyright © 2016–2018 Arm Limited or its affiliates. All rights reserved.