B1.29.2 DISR with Long-descriptor translation table format

DISR has a specific format when written at EL1 using the Long-descriptor translation table format.

The following figure shows the DISR bit assignments when using the Long-descriptor translation table format.

When TTBCR.EAE==1:

Figure B1-27 DISR bit assignments for Long-descriptor translation table format
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A, [31]

Set to 1 when ESB defers an asynchronous SError interrupt.

RES0, [30:16]
res0 Reserved.
AET, [15:14]

Asynchronous Error Type. Describes the state of the core after taking an asynchronous Data Abort exception. The value is:


Uncorrected error, Unrecoverable error (UEU).

RES0, [13]
Ext, [12]

External Abort Type. This bit is defined as RES0.

RES0, [11:10]
LPAE, [9]

On taking a Data Abort exception, this bit is set as follows:

1Using the Long-descriptor translation table formats.

Hardware does not interpret this bit to determine the behavior of the memory system, and therefore software can set this bit to 0 or 1 without affecting operation.

RES0, [8:6]
Status, [5:0]

Fault Status Code. This field indicates the type of exception generated. See the DFSR.DFSC in the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile for an SError interrupt.

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