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VTTBR_EL2 holds the base address of the translation table for the stage 2 translation of memory accesses from Non-secure modes other than Hyp mode.
VTTBR_EL2 is a 64-bit register, and is part of:
CnP is not supported.
VTTBR_EL2 is architecturally mapped to AArch32 register VTTBR. See B1.92 VTTBR, Virtualization Translation Table Base Register.
Used in conjunction with the VTCR.
If EL2 is not implemented, this register is res0 from EL3.
RW fields in this register reset to architecturally unknown values.
Bit fields and details that are not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.