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This book is for the Cortex-A55 core Advanced SIMD and floating-point support.
n identifier indicates the revision status of the product described in this book, for example, r
|r||Identifies the major revision of the product, for example, r1.|
|p||Identifies the minor revision or modification status of the product, for example, p2.|
This manual is for system designers, system integrators, and programmers who are designing or programming a System-on-Chip (SoC) that uses the Cortex®-A55 core with the optional Advanced SIMD and floating-point support.
This book is organized into the following chapters:
This chapter introduces the optional Advanced SIMD and floating-point support.
This chapter describes the AArch64 registers for the Cortex®-A55 core Advanced SIMD and floating-point support.
This chapter describes the AArch32 registers for the Cortex®-A55 core Advanced SIMD and floating-point support.
This appendix describes the technical changes between released issues of this book.
The Arm® Glossary is a list of terms used in Arm documentation, together with definitions for those terms. The Arm Glossary does not contain terms that are industry standard unless the Arm meaning differs from the generally accepted meaning.
See the Arm® Glossary for more information.
MRC p15, 0, <Rd>, <CRn>, <CRm>, <Opcode_2>
This book contains information that is specific to this product. See the following documents for other relevant information.
The following confidential documents are only available to licensees: