This chapter describes the AArch32 registers for the Cortex®-A55 core Advanced SIMD and floating-point support.
the AArch32 feature identification registers.
3.2 AArch32 register summary.
3.3 FPSID, Floating-Point System ID Register.
3.4 FPSCR, Floating-Point Status and Control Register.
3.5 MVFR0, Media and VFP Feature Register 0.
3.6 MVFR1, Media and VFP Feature Register 1.
3.7 MVFR2, Media and VFP Feature Register 2.
3.8 FPEXC, Floating-Point Exception Control register.