3.3.136 t_rw_odt_clr_next

This timing parameter applies extra guard-band between the last issued rd/wr command and potential ZQC, SREF, and MRS commands which are issued automatically by hardware such as tpoll. This may be necessary to prevent overlap of these automated commands with ranks actively participating in non-target rank ODT (while other ranks are streaming data). ZQC, MRS, and SREF commands are typically not allowed on non-target ranks in this case as these commands could change ODT settings. In general, if non-target rank termination is used this parameter should be programmed to t_odt_off_rd/wr(max setting) + DODTLoff(from DDR4 spec) Access restrictions: RW Can be read from when in ALL states. Can be written to when in ALL states.

The t_rw_odt_clr_next register characteristics are:

Usage constraints

There are no usage constraints.

Configurations

There is only one DMC configuration.

Attributes
Offset

0x27C

Type

Read-write

Reset

0x00000000

Width

32

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