Non-ConfidentialPDF file icon PDF versionARM 100568_0000_01_en
ARM® CoreLink™ DMC-620 Dynamic Memory Controller Technical Reference ManualRevision r0p0
Home > Programmers Model > Register descriptions > pmu_clkdiv2_counter_3_snapshot_value_31_00

3.3.287 pmu_clkdiv2_counter_3_snapshot_value_31_00

value of the pmu snapshot registers Access restrictions: RO Can be read from when in ALL states. Cannot be changed.

The pmu_clkdiv2_counter_3_snapshot_value_31_00 register characteristics are:

Usage constraints

There are no usage constraints.

Configurations

There is only one DMC configuration.

Attributes
Offset

0xAA0
Type

Read-only
Reset

0x00000000
Width

32
Non-ConfidentialPDF file icon PDF versionARM 100568_0000_01_en
Copyright © 2016 ARM Limited or its affiliates. All rights reserved. 
Home > Programmers Model > Register descriptions > pmu_clkdiv2_counter_3_snapshot_value_31_00