3.3.211 err1misc0

This register gives the Physical Rank, Row, and Column of the last error detected before an interrupt is asserted. Access restrictions: RW Can be read from when in ALL states. Can be written to when in ALL states.

The err1misc0 register characteristics are:

Usage constraints

There are no usage constraints.

Configurations

There is only one DMC configuration.

Attributes
Offset

0x760

Type

Read-write

Reset

0x00000000

Width

32

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