3.3.4 address_control_next

Configures the DRAM address parameters. Use the DRAM device data sheet or Serial Presence Detect (SPD)-derived values to assist in programming these values. Access restrictions: RW Can be read from when in ALL states. Can be written to when in ALL states.

The address_control_next register characteristics are:

Usage constraints

There are no usage constraints.

Configurations

There is only one DMC configuration.

Attributes
Offset

0x010

Type

Read-write

Reset

0x00030202

Width

32

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