Non-Confidential | ![]() | ARM 100568_0000_01_en | ||
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Home > Programmers Model > Register descriptions > t_rdlvl_rr_now |
Configures the t_rdlvl_rr timing parameter. This specifies the cycle delay between training commands. It also specifies the minimum delay between the last training command and deasserting dfi_rdlvl_en after observing dfi_rdlvl_resp. Access restrictions: RO Can be read from when in ALL states. Cannot be written to and only updated when in CONFIG, LOW-POWER or PAUSED states.
The t_rdlvl_rr_now register characteristics are:
There are no usage constraints.
There is only one DMC configuration.
Offset |
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Type | Read-only |
Reset |
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Width | 32 |