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Arm® CoreLink™ DMC-620 Dynamic Memory Controller Technical Reference ManualRevision r1p0
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1.5 Configurable options

The DMC-620 has the following configurable options:

Table 1-1 Configurable options

Option Parameter Default Default value Description
CHI-A, CHI-B, or CHI-C DMC_CHIB, DMC_CHIC CHIC 1 Configures an AMBA® 5 CHI Protocol Specification CHI Issue A, CHI Issue B, or CHI Issue C.

Note:

For CHI-C, both parameters CHI-B and CHI-C must be 1.
128-bit or 256-bit CHI-B interface DMC_SYS_DATA_WIDTH 128 256 Valid in CHI-B only. Configures a 128-bit or 256-bit CHI interface.
Include Symbol ECC DMC_SYM_ECC Yes 1 Includes logic for Symbol ECC. Symbol ECC is only supported with a x64 DRAM interface.
Queue depth DMC_QUEUE_DEPTH 128 128 Can select a depth of 64 or 128.

Note:

  • If Symbol ECC is excluded from the configuration, you must ensure the err0ctlr_ecc field is never set to 2.
  • If the DMC is configured for a CHI-A interconnect, you must ensure the err0ctlr_cpi and err0ctlr_cdi fields are set to ignore the CHI-B Data Byte Parity (DBP) and poison bits.
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