This section lists the interfaces in the DMC-620.
The DMC-620 has the following external interfaces:
- A System interface to provide read and write access to or
from a master that supports either the CHI-A, CHI-B, or CHI-C protocol.
- An APB3 programmers interface to program and control the DMC-620.
- A DFI-compatible PHY interface to transfer data to and from the external
- A Profile and Debug interface.
- A Low-power clock control interface that uses the Q-Channel protocol. See
- An Abort interface that is a four-phase request and acknowledge handshake.
The Abort interface can be used to recover from a livelock when DRAM or PHY
- User I/O ports.
- A set of interrupts that are used to report operational events and