2.4 Constraints and limitations of use

The constraints and limitations of the DMC-620 depend on the SDRAMs used, and the interoperability within the PHYs. Which in turn, depends on the DDR Physical Interface (DFI) parameters.

The SDRAMs supported by the DMC-620 are:

Note:

These devices are described in the JEDEC specifications that are global standards for the microelectronics industry.

The DIMMs supported by the DMC-620 are:

The JEDEC specification implies the following constraints and must be met:

  1. t_xp < t_xsr - Exiting power down timing must be less than self-refresh exit.
  2. t_mrw_cs < t_mrw - The delay after a Mode Register Write command and before any other command is issued to a different rank. This delay must be less than the delay applied after a Mode Register Write command and before any other command is issued to the same rank.
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