|Home > Programmers model > Register summary > t_rdlvl_rr_now|
Configures the t_rdlvl_rr timing parameter. This specifies the cycle delay between training commands. It also specifies the minimum delay between the last training command and deasserting dfi_rdlvl_en after observing dfi_rdlvl_resp. Access restrictions: RO Can be read from when in ALL states. Cannot be written to and only updated when in CONFIG, LOW-POWER or PAUSED states.
The t_rdlvl_rr_now register characteristics are:
There are no usage constraints.
There is only one DMC configuration.