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This register is the global control register for the DMC RAS functions. This register control features such as ECC type and enable, error reporting and interrupt enable, error deferment, etc. The setting of a Global control record bit affects all records. Access restrictions: RW Can be read from when in ALL states. Can be written to when in CONFIG or LOW-POWER states.
The err0ctlr0 register characteristics are:
There are no usage constraints.
There is only one DMC configuration.