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Determines the time between a WRITE command commencing on the DFI interface, and the assertion of the dfi_wrdata_en, dfi_wrdata_cs and dfi_wrdata signals. Access restrictions: RW Can be read from when in ALL states. Can be written to when in ALL states.
The t_phywrlat_next register characteristics are:
There are no usage constraints.
There is only one DMC configuration.