|Home > Programmers model > Register summary > t_rrd_next|
Configures the tRRD timing parameter. This determines the delay applied after an ACTIVATE command before another ACTIVATE command is issued to the same rank. The _l and _s fields apply to the same bank group, a different bank group, and different logical rank, respectively, as described in the DDR4 specification. Access restrictions: RW Can be read from when in ALL states. Can be written to when in ALL states.
The t_rrd_next register characteristics are:
There are no usage constraints.
There is only one DMC configuration.