3.3.67 dci_replay_type_next

Configures the behavior of the DMC if a DRAM or PHY error is received when executing a direct command. Access restrictions: RW Can be read from when in ALL states. Can be written to when in ALL states.

The dci_replay_type_next register characteristics are:

Usage constraints

There are no usage constraints.

Configurations

There is only one DMC configuration.

Attributes
Offset

0x110

Type

Read-write

Reset

0x00000002

Width

32

Non-ConfidentialPDF file icon PDF version100568_0100_00_en
Copyright © 2016, 2017 Arm Limited (or its affiliates). All rights reserved.