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Determines which of the 8 dfi_odt[7:0] output signals are driven during a write to DRAM. Access restrictions: RO Can be read from when in ALL states. Cannot be written to and only updated when in CONFIG, LOW-POWER or PAUSED states.
The odt_cp_control_63_32_now register characteristics are:
There are no usage constraints.
There is only one DMC configuration.