|Home > Debug registers > ETM registers > TRCCCCTLR, Cycle Count Control Register|
The TRCCCCTLR sets the threshold value for cycle counting.
The TRCCCCTLR is a 32-bit register.
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCCCCTLR can be accessed through the external debug interface, offset