D9.28 TRCEXTINSELR, External Input Select Register

The TRCEXTINSELR controls the selectors that choose an external input as a resource in the ETM trace unit. You can use the Resource Selectors to access these external input resources.

Bit field descriptions

Figure D9-26 TRCEXTINSELR bit assignments
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RES0, [31:29]
res0Reserved.
SEL3, [28:24]
Selects an event from the external input bus for External Input Resource 3.
RES0, [23:21]
res0Reserved.
SEL2, [20:16]
Selects an event from the external input bus for External Input Resource 2.
RES0, [15:13]
res0Reserved.
SEL1, [12:8]
Selects an event from the external input bus for External Input Resource 1.
RES0, [7:5]
res0Reserved.
SEL0, [4:0]
Selects an event from the external input bus for External Input Resource 0.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The TRCEXTINSELR can be accessed through the external debug interface, offset 0x120.

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