D9.50 TRCOSLAR, OS Lock Access Register

The TRCOSLAR sets and clears the OS Lock, to lock out external debugger accesses to the ETM trace unit registers.

Bit field descriptions

The TRCOSLAR is a 32-bit register.

Figure D9-48 TRCOSLAR bit assignments
To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.


RES0, [31:1]
res0Reserved.
OSLK, [0]

OS Lock key value:

0Unlock the OS Lock.
1Lock the OS Lock.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The TRCOSLAR can be accessed through the external debug interface, offset 0x300.

Non-ConfidentialPDF file icon PDF version100798_0301_00_en
Copyright © 2016–2018 Arm Limited or its affiliates. All rights reserved.