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Home > Debug registers > ETM registers > TRCITCTRL, Integration Mode Control Register |
The TRCITCTRL enables topology detection or integration testing, by putting the ETM trace unit into integration mode.
The TRCITCTRL is a 32-bit register.
res0 | Reserved. |
Integration mode enable bit. The possible values are:
0 | The trace unit is not in integration mode. |
1 | The trace unit is in integration mode. This mode enables:
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Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCITCTRL can be accessed through the external debug interface, offset
.0xF00