D9.48 TRCLSR, Software Lock Status Register

The TRCLSR determines whether the software lock is implemented, and indicates the current status of the software lock.

Bit field descriptions

The TRCLSR is a 32-bit register.

Figure D9-46 TRCLSR bit assignments
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RES0, [31:3]
res0Reserved.
nTT, [2]

Indicates size of TRCLAR:

0TRCLAR is always 32 bits.
SLK, [1]

Software lock status:

0Software lock is clear.
1Software lock is set.
SLI, [0]

Indicates whether the software lock is implemented on this interface.

1Software lock is implemented on this interface.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The TRCLSR can be accessed through the external debug interface, offset 0xFB4.

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