D9.56 TRCPIDR2, ETM Peripheral Identification Register 2

The TRCPIDR2 provides information to identify a trace component.

Bit field descriptions

The TRCPIDR2 is a 32-bit register.

Figure D9-54 TRCPIDR2 bit assignments
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RES0, [31:8]
res0Reserved.
Revision, [7:4]
0x0

ETM revision.

JEDEC, [3]
0b1res1. Indicates a JEP106 identity code is used.
DES_1, [2:0]
0b011Arm Limited. This is bits[6:4] of JEP106 ID code.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.

The TRCPIDR2 can be accessed through the external debug interface, offset 0xFE8.

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