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Home > Debug registers > ETM registers > TRCCIDR0, ETM Component Identification Register 0 |
The TRCCIDR0 provides information to identify a trace component.
The TRCCIDR0 is a 32-bit register.
res0 | Reserved. |
| Preamble byte 0. |
Bit fields and details not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The TRCCIDR0 can be accessed through the external debug interface, offset
.0xFF0