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Arm® Cortex®‑A76 Core Technical Reference ManualRevision r3p1
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C3.3 AMU counters

  • All events are counted in 64-bit wrapping counters that overflow when they wrap. There is no support for overflow status indication or interrupts.
  • Counters monitoring cycle events do not increment when the core is in WFI or WFE state.
  • Events 0, 1, 2, 3, and 4 are fixed, and the AMEVTYPER<n> evtCount bits are read-only.
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