lbl.part C Debug descriptions

Table of Contents

C1 Debug
C1.1 About debug methods
C1.2 Debug register interfaces
C1.2.1 Core interfaces
C1.2.2 Breakpoints and watchpoints
C1.2.3 Effects of resets on debug registers
C1.2.4 External access permissions to debug registers
C1.3 Debug events
C1.3.1 Watchpoint debug events
C1.3.2 Debug OS Lock
C1.4 External debug interface
C2 Performance Monitor Unit
C2.1 About the PMU
C2.2 PMU functional description
C2.2.1 External register access permissions
C2.3 PMU events
C2.4 PMU interrupts
C2.5 Exporting PMU events
C3 Activity Monitor Unit
C3.1 About the AMU
C3.2 Accessing the activity monitors
C3.2.1 Access enable bit
C3.2.2 System register access
C3.2.3 External memory-mapped access
C3.3 AMU counters
C3.4 AMU events
C4 Embedded Trace Macrocell
C4.1 About the ETM
C4.2 ETM trace unit generation options and resources
C4.3 ETM trace unit functional description
C4.4 Resetting the ETM
C4.5 Programming and reading ETM trace unit registers
C4.6 ETM trace unit register interfaces
C4.7 Interaction with the PMU and Debug
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