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Arm® Cortex®‑A76 Core Technical Reference ManualRevision r4p0
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About this book

This Technical Reference Manual is for the Cortex®‑A76 core. It provides reference documentation and contains programming details for registers. It also describes the memory system, the caches, the interrupts, and the debug features.

Product revision status

The rmpn identifier indicates the revision status of the product described in this book, for example, r1p2, where:

rmIdentifies the major revision of the product, for example, r1.
pnIdentifies the minor revision or modification status of the product, for example, p2.

Intended audience

This manual is for system designers, system integrators, and programmers who are designing or programming a System-on-Chip (SoC) that uses an Arm core.

Additional reading

This book contains information that is specific to this product. See the following documents for other relevant information.

Arm publications
  • Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile (DDI 0487).
  • Arm® Cortex®‑A76 Core Cryptographic Extension Technical Reference Manual (100801).
  • Arm® Cortex®‑A76 Core Configuration and Sign-off Guide (100799).
  • Arm® Cortex®‑A76 Core Integration Manual (100800).
  • Arm® DynamIQ™ Shared Unit Integration Manual (100455).
  • Arm® DynamIQ™ Shared Unit Technical Reference Manual (100453).
  • Arm® DynamIQ™ Shared Unit Configuration and Sign-off Guide (100454).
  • Arm® CoreSight™ ELA-500 Embedded Logic Analyzer Technical Reference Manual (100127).
  • AMBA® AXI and ACE Protocol Specification AXI3, AXI4, AXI5, ACE and ACE5 (IHI 0022).
  • AMBA® APB Protocol Version 2.0 Specification (IHI 0024).
  • Arm® AMBA® 5 CHI Architecture Specification (IHI 0050).
  • Arm® CoreSight™ Architecture Specification v3.0 (IHI 0029).
  • Arm® Debug Interface Architecture Specification, ADIv5.0 to ADIv5.2 (IHI 0031).
  • AMBA® 4 ATB Protocol Specification (IHI 0032).
  • Arm® Generic Interrupt Controller Architecture Specification (IHI 0069).
  • Arm® Embedded Trace Macrocell Architecture Specification ETMv4 (IHI 0064).
  • AMBA® Low Power Interface Specification Arm® Q-Channel and P-Channel Interfaces (IHI 0068).
  • Arm® Reliability, Availability, and Serviceability (RAS) Specification, Armv8, for the Armv8-A architecture profile (DDI 0587A).
Other publications
  • ANSI/IEEE Std 754-2008, IEEE Standard for Binary Floating-Point Arithmetic.

    Note:

    Arm floating-point terminology is largely based on the earlier ANSI/IEEE Std 754-1985 issue of the standard. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile for more information.
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Home > Preface > About this book