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The Cortex®‑A76 core L1 memory system has an internal exclusive monitor.
This monitor is a 2-state, open and exclusive, state machine that manages
Load-Exclusive or Store-Exclusive accesses and Clear-Exclusive (
CLREX) instructions. You can use these instructions to construct semaphores,
ensuring synchronization between different processes running on the core, and also between
different cores that are using the same coherent memory locations for the semaphore. A
Load-Exclusive instruction tags a small block of memory for exclusive access. CTR.ERG
defines the size of the tagged block as 16 words, one cache line.
A load/store exclusive instruction is any one of the following:
See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile for more information about these instructions.