|Home > Register descriptions > AArch64 system registers > SCTLR_EL2, System Control Register, EL2|
The SCTLR_EL2 provides top-level control of the system, including its memory system at EL2.
SCTLR_EL2 is a 32-bit register, and is part of:
This register resets to
If EL2 is not implemented, this register is RES0 from EL3.
Bit fields and details that are not provided in this description are architecturally defined. See the Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.