D3.3 EDCIDR1, External Debug Component Identification Register 1
The EDCIDR1 provides information to identify an external debug component.
Bit field descriptions
The EDCIDR1 is a 32-bit register.
D3-2 EDCIDR1 bit assignments
- RES0, [31:8]
- CLASS, [7:4]
- PRMBL_1, [3:0]
Bit fields and details not provided in this description are
architecturally defined. See the
Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile.
The EDCIDR1 can be accessed through the external debug interface, offset