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The TRCSYNCPR controls how often periodic trace synchronization requests occur.
The TRCSYNCPR is a 32-bit register.
Defines the number of bytes of trace between synchronization requests as a total of the number of bytes generated by both the instruction and data streams. The number of bytes is 2N where N is the value of this field:
Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.
The TRCSYNCPR can be accessed through the external debug interface, offset