D10.70 TRCTRACEIDR, Trace ID Register

The TRCTRACEIDR sets the trace ID for instruction trace.

Bit field descriptions

The TRCTRACEIDR is a 32-bit register.

Figure D10-66 TRCTRACEIDR bit Assignments
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RES0, [31:7]
res0Reserved.
TRACEID, [6:0]

Trace ID value. When only instruction tracing is enabled, this provides the trace ID.

Bit fields and details not provided in this description are architecturally defined. See the Arm® Embedded Trace Macrocell Architecture Specification ETMv4.

The TRCTRACEIDR can be accessed through the external debug interface, offset 0x040.

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